This directory contains an ACL2 library of floating-point arithmetic,
developed at AMD from 1996 to 2002 in support of the mechanical
verification of floating-point and other units of AMD microprocessors
that were designed during that period.  Earlier versions of this
library are contained in the sibling directories "../rel1" and
"../rel2".  The first version was developed by David Russinoff.  The
present release incorporates extensions and modifications by Russinoff
and Eric Smith, with technical assistance from Matt Kaufmann.  In
particular:

(1) A variety of new lemmas, derived as needed during the course
    of our ongoing verification work, have been added.

(2) Unnecessary hypotheses have been identified and eliminated from
    lemmas in order to improve the efficiency of their application.

(3) Many lemmas that were previously applied only via ":use" hints
    have acquired rule classes, especially ":rewrite", in order to 
    make proofs more nearly automatic.

(4) The section on floating-point representations has been expanded to
    include formats with both explicit and implicit leading ones, as
    well as denormal representations.

(5) The section on rounding has been extended to address (a) denormal
    rounding and (b) a variant of "round-to-nearest" that maps any
    number midway between two adjacent representable numbers to the
    larger of the two.

In spite of (3) above, our proof methodology remains relatively
conservative in this sense: whenever the application of a rule is
considered to be potentially undesirable and unpredictable, the rule
is disabled in the default theory.  In general, therefore, it is
necessary for the user of the library to plan his proofs at a fairly
low level in order to engineer the application of relevant lemmas.

The library's definitions and lemmas are contained in the subdirectory
"lib".  A parallel subdirectory, "support", contains a superset of
these events, including all sublemmas that were required for the proofs
of the library lemmas.  Thus, the books of "support" must be certified
before those of "lib", but the user is otherwise discouraged from
accessing the former.  The books of each directory may certified by
loading the file "cert.lsp" in that directory.

The "lib" books are as follows:

basic -- properties of basic arithmetic functions: floor, ceiling, 
         exponential, and remainder

bits -- bit vectors and logical operations

float -- floating-point numbers

reps -- floating-point formats and representations

round -- floating-point rounding

fadd -- support for reasoning about floating-point addition
        (leading one prediction and sticky bit computation)
 
brat -- support of binary notation

The book "brat" plays no role in the library.  It is included here
because you may find it convenient to use binary notation while
experimenting with the library.  You may wish to include this book to
obtain ACL2 :program mode functions for converting between binary
rationals and conventional binary notation, e.g., converting 209/16 to
B1101.0001, or vice versa.  See the comment at the top of the file
"brat.lisp".

In order to include all books of the library, simply include the book
"top" of the same directory.

The library files contain virtually no documentation, but many of the
interesting events are formal versions of definitions and lemmas that
are stated and proved in the earlier sections of the following three
papers, which document various applications of the library:

  D.M. Russinoff, A mechanically checked proof of correctness of the AMD-K5
  floating point square root microcode, Formal Methods in System Design 14, 
  75-125 (1999).  See
  http://www.onr.com/user/russ/david/fsqrt.html.

  D.M. Russinoff, A mechanically checked proof of IEEE compliance of the AMD-K7
  floating point multiplication, division, and square root instructions,
  London Mathematical Society Journal of Computation and Mathematics (1), 
  pp. 148-200, December, 1998.  See
  http://www.onr.com/user/russ/david/k7-div-sqrt.html.

  D.M. Russinoff, A case study in formal verification of register-transfer 
  logic with ACL2: the floating point adder of the AMD Athlon processor,
  invited paper, FMCAD 2000.  See
  http://www.onr.com/user/russ/david/fadd.html.
