#****************************************************************************
#*                      README for the sdb_stim Example
#*
#* Author: Matthew Ballance
#****************************************************************************

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- Running
-----------------------------
    - Copy the directory $IVI_HOME/share/ivi/examples/sdb_stim to a local
    directory.

    - Build the design by running the 'build' script in the sdb_stim directory.

    - Run the example by executing the 'run' script in the sdb_stim directory.

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- Results
-----------------------------
    The 'sdb_stim' example runs IVI twice. 
    The first time, a verilog testbench is used to create input signals 
to a simple ALU (the DUT). The input signals are saved to a file. 
    In the second run, a 'stub' testbench instantiates the ALU. The testbench
is needed so that inputs to the ALU have registers attached (values may not
be driven on unconnected wires). The saved data from the first simulation is 
used to drive the inputs of the ALU.

    When the second simulation stops, you will see the waveform window with 
the original simulation data and the replayed-simulation data.


